Published at: 11:12 pm - Sunday December 15 2013
The following is a conversation I recently had with an alert and inquisitive reader. It has been redacted for brevity; handles/names/irrelevant things have been removed. Some text has been turned into links to relevant material. Anyone still reading this page for reasons related to its original purpose is encouraged to read this; it may help […]
Published at: 05:05 pm - Tuesday May 08 2012
At present, I have taken a break from the hardware aspects of Loper – to work on “Jupiter,” a Linux-based emulator of the system’s essential aspects. (Think QEMU.) Jupiter is unlikely to be of any practical use to anyone but myself. However, at some point, I will make it public, so that interested persons who […]
Published at: 01:03 pm - Tuesday March 13 2012
Loper’s I2C controller is working. The SPD ROM on the DDR2 RAM stick attached to the Xilinx ML-501 board is read correctly. The video controller is working (though not feature-complete.) The DDR2 SDRAM controller is still under testing, as is the cache SRAM controller. The gigabit Ethernet controller is not yet complete. I should probably […]
Published at: 09:03 pm - Monday March 05 2012
Here is a somewhat dumb example of the kind of thing one can do with Stierlitz. Let’s say that you have some memory-mapped I/O ports in your system architecture, which you would like to test without having a working CPU design of any kind loaded into your FPGA. The Xilinx ML501 board includes a Tianma-TM162, […]
Published at: 06:02 pm - Friday February 24 2012
The tool described in this post may be helpful to other ab initio machine-architecture developers. If any exist. The rest of Loper will remain in my private code repository, because it is not a collaborative project. Meet Stierlitz [1], perhaps the world’s strangest bus analyzer. For basic use, it requires no software at all on […]
Published at: 07:01 pm - Friday January 20 2012
Progress has been slow, because I have been otherwise occupied for quite some time. Slow, but not entirely still. Since turning Loper OS into an ab initio CPU architecture project, I have been using Xilinx development boards for prototyping. For the past year — an ML-501. The FPGA toolchain itself is (grudgingly) Linux-friendly, but those […]
Published at: 12:11 pm - Wednesday November 23 2011
To stave off the never-ending questions — variations on the theme of “Where is Loper? Why the wait?” I would like to confess the following: I live a double life! I spend my days… working! For money! So that I can eat. Here is my current commercial project. It is a laboratory robotics controller, based […]
Published at: 01:12 pm - Friday December 26 2008
Loper should not be considered truly dead until I myself am dead and buried. Currently available computing systems are brain-damaged in such wholesale, unmitigable ways that I am driven back to the project again and again, despite the oceanic size and nearly certain futility of the task. Working full time and being back in school […]
Published at: 05:09 pm - Saturday September 27 2008
I feel obligated to remind my readers that the Loper repository does not yet contain a working operating system. (Unless you count a boot loader which performs basic x86-64 hardware initializations and prints “Hello World” as one.)
Published at: 12:08 pm - Saturday August 09 2008
The “Hello World” kernel boots, loads, initializes interrupts and paging, and switches successfully into 64-bit Long Mode. Now, the real fun can start.