Serpent in ICE40, Part 2.

This article is a continuation of “Can the Serpent Cipher fit in the ICE40 FPGA?”.

Below is a revision of the forward S-box of Serpent from the previous article, with all of the S-Box equations rewritten in the same form, [...]

Can the Serpent Cipher fit in the ICE40 FPGA?

The question of whether the Serpent cipher could fit in a ICE40 FPGA was posed recently, and my first thought was: why not bake what appears to be the heaviest moving part, and see how many gates it requires? Then it will be possible to estimate whether the entire thing [...]

The Alert Reader.

The following is a conversation I recently had with an alert and inquisitive reader. It has been redacted for brevity; handles/names/irrelevant things have been removed. Some text has been turned into links to relevant material.
Anyone still reading this page for reasons related to its original purpose is encouraged to read this; it may help to [...]

Stierlitz Example: Memory-Mapped I/O to a Character LCD

Here is a somewhat dumb example of the kind of thing one can do with Stierlitz.  Let’s say that you have some memory-mapped I/O ports in your system architecture, which you would like to test without having a working CPU design of any kind loaded into your FPGA.
The Xilinx ML501 board includes a Tianma-TM162, which [...]

Posted in: Cold Air, FPGA, Hardware, Lisp, LoperOS by Stanislav 4 Comments

Stierlitz, the Fearless, Driver-Less Bus Analyzer.

The tool described in this post may be helpful to other ab initio machine-architecture developers.  If any exist.  The rest of Loper will remain in my private code repository, because it is not a collaborative project.
Meet Stierlitz [1], perhaps the world’s strangest bus analyzer.  For basic use, it requires no software at all on the [...]

Posted in: Cold Air, FPGA, Hardware, Lisp, LoperOS, Progress by Stanislav 2 Comments

Cypress EZ-Host Firmware Development Under Linux.

Progress has been slow, because I have been otherwise occupied for quite some time.  Slow, but not entirely still.
Since turning Loper OS into an ab initio CPU architecture project, I have been using Xilinx development boards for prototyping.  For the past year —  an ML-501.  The FPGA toolchain itself is (grudgingly) Linux-friendly, but those for [...]

Posted in: Cold Air, FPGA, Hardware, LoperOS, Progress by Stanislav 20 Comments

No Formats, no Format Wars.

Computer users are forever being misled, successfully lied to, sold “old wine in new bottles,” bamboozled in a myriad ways large and small.  Why?  Simply because we are, to use the technical term, suckers.  Not always as individuals, but certainly collectively.  The defining attribute of the sucker is, of course, an [...]

You have made your bedrock, now lie in it.

As a child, I was quite fond of old-fashioned Lego bricks.  One very endearing but rarely discussed property of such bricks is their durability, bordering on the indestructible.  Almost any abuse inflicted on a Lego structure will, at worst, leave you with a pile of bricks entirely like the one you started with.  Even the most [...]

The Temptation

The temptation to implement a modernized Lisp architecture in a high-end FPGA never ceases to tug at me. It has recently re-asserted itself after my discovery that one can buy reasonably priced and fully assembled boards containing the latter, complete with SDRAM, DVI, SATA, etc. sockets. Verilog guides have silently crept into my browser tabs [...]

Posted in: Distractions, FPGA, Hot Air, LoperOS by Stanislav 3 Comments
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