X-Ray Spectrography Kindergarten.

This article is a continuation of “X-Ray Microscopy Kindergarten.”. Preliminary experiment with multi-energy x-ray (colour channel combination), distinguishing materials by absorption at different wavelengths. The tube appears to exhibit some “heel effect” at the longer wavelengths. Exposure: 75 sec. @ 35kV, 21kV, 20kV (R, G, B) film: “Eco-30”.

X-Ray Stereography Kindergarten.

This article is a continuation of “X-Ray Microscopy Kindergarten.”. Here, we see a stereo pair (approx. +/- 25 deg. one-axis rotation of the object from the horizontal plane, while film is stationary) of the device from before. The vias are clearly distinguishable. Exposure: 70 sec. @ 34kV; 0.3mA + 2x beam spread; film: “Eco-30”.

X-Ray Microscopy Kindergarten.

This article is a continuation of “PCB Radiography Kindergarten, Continued.”. The radiography system is equipped with a “microfocus” tube, and its beam has a 30 degree spread cone. So we can get a look at that very same FG TRNG XC9572 CPLD seen earlier, but with 2x magnification: Click for full resolution (Warning: 7MB) This […]

PCB Radiography Kindergarten, Continued.

This article is a continuation of “PCB Radiography Kindergarten”. This was a second test-fire of that radiography system, using yet-another board where I already know where everything is (on account of having designed it.) This time, the victim is a FG TRNG Mainboard: Click for full resolution (Warning: 16MB) For comparison, a visible-light photograph of […]

Serpent in ICE40, Part 2.

This article is a continuation of “Can the Serpent Cipher fit in the ICE40 FPGA?”. Below is a revision of the forward S-box of Serpent from the previous article, with all of the S-Box equations rewritten in the same form, i.e. using strictly AND, OR, and NOT operations, with none having more than six subclauses, […]

Can the Serpent Cipher fit in the ICE40 FPGA?

Current Table of Contents: The question of whether the Serpent cipher could fit in a ICE40 FPGA was posed recently, and my first thought was: why not bake what appears to be the heaviest moving part, and see how many gates it requires? Then it will be possible to estimate whether the entire thing is […]

The Alert Reader.

The following is a conversation I recently had with an alert and inquisitive reader. It has been redacted for brevity; handles/names/irrelevant things have been removed. Some text has been turned into links to relevant material. Anyone still reading this page for reasons related to its original purpose is encouraged to read this; it may help […]

Stierlitz Example: Memory-Mapped I/O to a Character LCD

Here is a somewhat dumb example of the kind of thing one can do with Stierlitz.  Let’s say that you have some memory-mapped I/O ports in your system architecture, which you would like to test without having a working CPU design of any kind loaded into your FPGA. The Xilinx ML501 board includes a Tianma-TM162, […]

Posted in: Cold Air, FPGA, Hardware, Lisp, LoperOS, Reversing by Stanislav 4 Comments

Stierlitz, the Fearless, Driver-Less Bus Analyzer.

The tool described in this post may be helpful to other ab initio machine-architecture developers.  If any exist.  The rest of Loper will remain in my private code repository, because it is not a collaborative project. Meet Stierlitz [1], perhaps the world’s strangest bus analyzer.  For basic use, it requires no software at all on […]

Posted in: Cold Air, FPGA, Hardware, Lisp, LoperOS, Progress, Reversing by Stanislav 2 Comments

Cypress EZ-Host Firmware Development Under Linux.

Progress has been slow, because I have been otherwise occupied for quite some time.  Slow, but not entirely still. Since turning Loper OS into an ab initio CPU architecture project, I have been using Xilinx development boards for prototyping.  For the past year —  an ML-501.  The FPGA toolchain itself is (grudgingly) Linux-friendly, but those […]

Posted in: Cold Air, FPGA, Hardware, LoperOS, Progress, Reversing by Stanislav 20 Comments