This article is a continuation of the M series. The vpatch given below entirely re-implements the TLB (MMU) of M to use SIMD instructions from the AMD64 SSE2 set. Whereas previously TLB entries were kept in memory and searched iteratively, now we keep the Tags (3 byte each) sliced into three XMM registers, and search […]

This article is a continuation of the M series. The vpatch given below speeds up the execution of M by approximately 30% (as measured by the Dhrystone benchmark.) It implements separate single-entry TLB caches for reads and writes; a set of fastpath exception handlers; and several other minor optimizations. You will need: A Keccak-based VTron […]

Current Table of Contents: M is a MIPS-III system emulator, written purely in AMD64 assembly to make optimal use of commonplace iron. As discussed previously. M will run lightly-modified Linux kernels with strict logical isolation vs. the host (and vs. any other instances of itself.) That is, it in fact does exactly what e.g. QEMU […]