“Finite Field Arithmetic” Projected Release Timeline.

Several of my readers recently let me know (privately and in the Forum) that they are ready to pioneer the battlefield use of FFA. However they all have one question, “When the hell will be the beta release? And just how much spade work remains, and where?”

And so I have written this projection, to summarize the articles remaining to write (some of these are already written, and require revision to conform to the corrections introduced in the code earlier; others must still be written, and the corresponding program routines cleaned up, tested, and properly illuminated; hence the variation in the estimated periods required for each component.)

So, without further delay:

No. Chapter Title (Tentative) Target Pub. Date
12 Keccak-V Regrind and Karatsuba In-Depth. Nov. 18, 2018
13 Constant-Time “Shift” and “Rotate”. Nov. 25, 2018
14 Fast Modular Reduction. Dec. 9, 2018
15 Bounded Loops in FFACalc. Dec. 16, 2018
16 Generation of Cryptographic Primes. Dec. 30, 2018
17 Introducing: “P” System. Jan. 6, 2019
18 Practical Key Generation in “P”. Jan. 13, 2019
19 RSA with OAEP; Signature, Encryption, Decryption. Jan. 27, 2019
20 Practical GPG Migration. Feb. 3, 2019
21 Optional: ASM Subroutines for AMD-64. Feb. 10, 2019
22 Misc. Stylistic Massage and Beta Release! Feb. 17, 2019

I reserve the right to run “ahead” of this calendar, if time permits. But if at any point a target date cannot be met, I will post a revised timeline, along with discussion of any pertinent obstacle.

This entry was written by Stanislav , posted on Saturday November 10 2018 , filed under FFA, Friends, Progress . Bookmark the permalink . Post a comment below or leave a trackback: Trackback URL.

One Response to ““Finite Field Arithmetic” Projected Release Timeline.”

  • Stanislav says:

    Dear Readers,

    Ch. 14 will be delayed by several days: I found a subtle mistake in the proof this morning. The release schedule of the remaining chapters will not be substantially affected.


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What is the serial baud rate of the FG device ?

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